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JLab f1TDC-V2,V3 Library
V2:0x0e,V3:0x15
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JLab f1TDC-V2,V3 Library
V2:0x0e,V3:0x15
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Go to the source code of this file.
Data Structures | |
| struct | f1tdc_struct |
Functions | |
| int | f1Init (unsigned int addr, unsigned int addr_inc, int ntdc, int iFlag) |
| int | f1Slot (unsigned int i) |
| Convert an index into a slot number, where the index is the element of an array of F1TDCs in the order in which they were initialized. More... | |
| int | f1ConfigWrite (int id, int *config_data, int chipMask) |
| Write the specified configuration to provided chips of the module in slot id indicated by the chipmask. More... | |
| int | f1GConfigWrite (int *config_data, int chipMask) |
| Write the specified configuration to provided chips of all initialized f1TDCs indicated by the chipmask. More... | |
| int | f1SetConfig (int id, int iflag, int chipMask) |
| Set which preset/user configuration to use for specified slot id for indicated chips in chipmask. More... | |
| int | f1ConfigRead (int id, unsigned int *config_data, int chipID) |
| Read the f1TDC Chip Registers into user specified config_data array. More... | |
| int | f1ConfigReadFile (char *filename) |
| Read in user defined (4) f1TDC chip registers from specified file. More... | |
| void | f1ConfigShow (int id, int chipMask) |
| Print to standard out the configuration of the f1TDC chips specified by the chipmask and module in slot id. More... | |
| int | f1GetSerialNumber (int id, char **rval) |
| Fills 'rval' with a character array containing the fa250 serial number. More... | |
| int | f1GetFirmwareVersion (int id, int pflag) |
| Get the firmware version of the FPGA. More... | |
| void | f1Status (int id, int sflag) |
| Print Status of f1TDC to standard out. More... | |
| void | f1GStatus (int sFlag) |
| Print Status of all initialized f1TDCs to standard out. More... | |
| void | f1ChipStatus (int id, int pflag) |
| Print Status of f1TDC chips to standard out. More... | |
| int | f1ReadBlock (int id, volatile unsigned int *data, int nwrds, int rflag) |
| int | f1PrintEvent (int id, int rflag) |
| Readout and print event to standard out. More... | |
| int | f1FlushEvent (int id) |
| Routine to flush a partial event from the FIFO. Read until a valid trailer is found. More... | |
| int | f1GPrintEvent (int rflag) |
| Readout and print event from all initialized f1TDCs to standard out. More... | |
| void | f1Clear (int id) |
| Perform a soft reset on the f1TDC module. More... | |
| void | f1GClear () |
| Perform a soft reset on all initialized f1TDC modules. More... | |
| void | f1ClearStatus (int id, unsigned int chipMask) |
| Clear the latched error status of specified f1TDC chips in the chipMask. More... | |
| void | f1GClearStatus (unsigned int chipMask) |
| Clear the latched error status of specified f1TDC chips in the chipMask in all initialized f1TDCs. More... | |
| unsigned int | f1ErrorStatus (int id, int sflag) |
| Return the Error status for all the f1TDC chips on the module. More... | |
| unsigned int | f1GErrorStatus (int sflag) |
| Return the Error status for all the f1TDC chips on all initialized modules. More... | |
| int | f1CheckLock (int id) |
| Get Resolution lock status for all chips on the board. More... | |
| int | f1GCheckLock (int pflag) |
| Get Resolution lock status for all chips on all initialized f1TDCs. More... | |
| void | f1Reset (int id, int iFlag) |
| Perform a hard reset of the module. More... | |
| void | f1SyncReset (int id) |
| Perform a software Sync Reset on the module. More... | |
| void | f1GSyncReset () |
| Perform a software Sync Reset for all initialized modules. More... | |
| void | f1Trig (int id) |
| Issue a software trigger to the module. More... | |
| void | f1GTrig () |
| Issue a software trigger to all initialized modules. More... | |
| void | f1Start (int id) |
| Issue a software Start signal to the module. More... | |
| void | f1GStart () |
| Issue a software Start signal to all initialized modules. More... | |
| int | f1Dready (int id) |
| Determine if an event is ready for readout on the module. More... | |
| unsigned int | f1GBready () |
| Return the mask of all initialized modules with blocks available for readout. More... | |
| int | f1DataScan (int pflag) |
| Return the mask of all initialized modules with events available for readout. More... | |
| unsigned int | f1ScanMask () |
| Return the mask of all initialized modules. More... | |
| int | f1GetRez (int id) |
| Return the mask of f1TDCs chips on the module that are set in high resolution mode. More... | |
| int | f1SetWindow (int id, int window, int latency, int chipMask) |
| Set the window parameters for specified f1TDC chips in chipMask on the module. More... | |
| void | f1GSetWindow (int window, int latency, int chipMask) |
| Set the window parameters for specified f1TDC chips in chipMask for all initialized modules. More... | |
| unsigned int | f1ReadCSR (int id) |
| Return the value of the CSR register of the module. More... | |
| int | f1WriteControl (int id, unsigned int val) |
| Write provided value to the CTRL register of the module. More... | |
| void | f1GWriteControl (unsigned int val) |
| Write provided value to the CTRL register to all initialized modules. More... | |
| int | f1Enable (int id) |
| Enable f1TDC FPGA data fifo on the module. More... | |
| int | f1GEnable () |
| Enable f1TDC FPGA data fifo on all initialized modules. More... | |
| int | f1Disable (int id) |
| Disable f1TDC FPGA data fifo on the module. More... | |
| int | f1GDisable () |
| Disable f1TDC FPGA data fifo on all initialized modules. More... | |
| int | f1Enabled (int id) |
| Return enabled/disabled status of FPGA data fifo. More... | |
| int | f1EnableData (int id, int chipMask) |
| Enable data on f1TDC chips specified in chipMask for the module. More... | |
| void | f1GEnableData (int chipMask) |
| Enable data on f1TDC chips specified in chipMask for all initialized modules. More... | |
| int | f1DisableData (int id) |
| Disable data on all f1TDC chips for the module. More... | |
| int | f1DisableChannel (int id, int input) |
| Disable an individual channel input. More... | |
| int | f1EnableChannel (int id, int input) |
| Enable an individual channel input. More... | |
| void | f1DisableChannelMask (int id, unsigned long long int mask) |
| Disable inputs indicated in channel mask for the module. More... | |
| void | f1EnableChannelMask (int id, unsigned long long int mask) |
| Enable inputs indicated in channel mask for the module. More... | |
| void | f1EnableClk (int id, int cflag) |
| Enable the specified clock source on the module. More... | |
| void | f1DisableClk (int id) |
| Disable the current clock source on the module. More... | |
| unsigned int | f1EnableLetra (int id, int chipMask) |
| Enable lead and trailing edges for the f1TDC chips indicated by the chipMask for the module. More... | |
| unsigned int | f1DisableLetra (int id, int chipMask) |
| Disable lead and trailing edges for the f1TDC chips indicated by the chipMask for the module. More... | |
| void | f1EnableSoftTrig (int id) |
| Enable software triggers on the module. More... | |
| void | f1GEnableSoftTrig () |
| Enable software triggers for all initialized modules. More... | |
| void | f1DisableSoftTrig (int id) |
| Disable software triggers on the module. More... | |
| void | f1EnableBusError (int id) |
| Enable bus error block termination on the module. More... | |
| void | f1GEnableBusError () |
| Enable bus error block termination for all initialized modules. More... | |
| void | f1DisableBusError (int id) |
| Disable bus error block termination on the module. More... | |
| int | f1SetBlockLevel (int id, int level) |
| Set the block level (number of events per block) on the module. More... | |
| void | f1GSetBlockLevel (int level) |
| Set the block level (number of events per block) on all initialized modules. More... | |
| void | f1EnableMultiBlock (int tflag) |
| Enable multiblock readout for all initialized modules. More... | |
| void | f1DisableMultiBlock () |
| Disable multiblock readout for all initialized modules. More... | |
| void | f1ResetToken (int id) |
| Reset the token for the module. More... | |
| int | f1ResetPulser (int id) |
| Reset (initialize) pulser. More... | |
| int | f1SetPulserTriggerDelay (int id, int delay) |
| Set the delay between the output pulse and f1TDC trigger. More... | |
| int | f1SetPulserDAC (int id, int output, int dac) |
| Set the DAC level for the outgoing pulse. More... | |
| int | f1SoftPulser (int id, int output) |
| Trigger the pulser. More... | |
| void | f1TestSetSystemTestMode (int id, int mode) |
| Enable/Disable System test mode. More... | |
| void | f1TestSetTrigOut (int id, int mode) |
| Set the level of Trig Out to the SD. More... | |
| void | f1TestSetBusyOut (int id, int mode) |
| Set the level of Busy Out to the SD. More... | |
| void | f1TestSetSdLink (int id, int mode) |
| Set the level of the SD Link. More... | |
| void | f1TestSetTokenOut (int id, int mode) |
| Set the level of Token Out to the SD. More... | |
| int | f1TestGetStatBitB (int id) |
| Get the level of the StatBitB to the SD. More... | |
| int | f1TestGetTokenIn (int id) |
| Get the level of the Token In from the SD. More... | |
| int | f1TestGetClockCounterStatus (int id) |
| Return the status of the 250Mhz Clock Counter. More... | |
| unsigned int | f1TestGetClockCounter (int id) |
| Return the value of the 250Mhz Clock scaler. More... | |
| unsigned int | f1TestGetSyncCounter (int id) |
| Return the value of the SyncReset scaler. More... | |
| unsigned int | f1TestGetTrig1Counter (int id) |
| Return the value of the trig1 scaler. More... | |
| unsigned int | f1TestGetTrig2Counter (int id) |
| Return the value of the trig2 scaler. More... | |
| void | f1TestResetClockCounter (int id) |
| Reset the counter of the 250MHz Clock scaler. More... | |
| void | f1TestResetSyncCounter (int id) |
| Reset the counter of the SyncReset scaler. More... | |
| void | f1TestResetTrig1Counter (int id) |
| Reset the counter of the trig1 scaler. More... | |
| void | f1TestResetTrig2Counter (int id) |
| Reset the counter of the trig2 scaler. More... | |
| void | f1DataDecode (int id, unsigned int data) |
| Decode a data word from an fADC250 and print to standard out. More... | |
| int | f1FirmwareReadFile (char *filename) |
| int | f1FirmwareEraseEPROM (int id) |
| int | f1FirmwareGEraseEPROM () |
| int | f1FirmwareDownloadConfigData (int id, int print_header) |
| int | f1FirmwareGDownloadConfigData () |
| int | f1FirmwareVerifyDownload (int id, int print_header) |
| int | f1FirmwareGVerifyDownload () |
| #define F1_A32_ADDR_MASK 0xffc0 |
Referenced by f1Status().
| #define F1_A32_ENABLE (1<<0) |
Referenced by f1Status().
| #define F1_ALL_CHIPS 0xff |
Referenced by f1ClearStatus(), f1ConfigShow(), f1ConfigWrite(), f1DisableLetra(), f1EnableData(), f1EnableLetra(), f1GConfigWrite(), f1Init(), f1Reset(), f1SetWindow(), and f1Status().
| #define F1_AMB_ENABLE (1<<0) |
Referenced by f1Status().
| #define F1_AMB_MAX_MASK 0xffc00000 |
Referenced by f1Status().
| #define F1_AMB_MIN_MASK 0xffc0 |
Referenced by f1Status().
| #define F1_BLOCKLEVEL_MASK 0xFFFF |
Referenced by f1SetBlockLevel(), and f1Status().
| #define F1_BOARD_ID 0xf10000 |
Referenced by f1Init().
| #define F1_CHIP_CLEAR_STATUS (1<<15) |
Referenced by f1ClearStatus(), f1ConfigWrite(), and f1GConfigWrite().
| #define F1_CHIP_ERROR_COND 0x1f1e |
Referenced by f1ErrorStatus(), f1GErrorStatus(), and f1Status().
| #define F1_CHIP_EXTFIFO_ALMOST_FULL (1<<5) |
Referenced by f1ChipStatus().
| #define F1_CHIP_EXTFIFO_EMPTY (1<<6) |
Referenced by f1ChipStatus().
| #define F1_CHIP_EXTFIFO_FULL (1<<4) |
Referenced by f1ChipStatus().
| #define F1_CHIP_HITFIFO_OVERFLOW (1<<1) |
Referenced by f1ChipStatus().
| #define F1_CHIP_INITIALIZED (1<<7) |
Referenced by f1ChipStatus().
| #define F1_CHIP_LATCH_STAT_MASK 0x1f00 |
Referenced by f1ChipStatus().
| #define F1_CHIP_LOSS_OF_LOCK_OCCURRED (1<<8) |
| #define F1_CHIP_OUTFIFO_OVERFLOW (1<<3) |
Referenced by f1ChipStatus().
| #define F1_CHIP_RES_LOCKED (1<<0) |
Referenced by f1CheckLock(), f1ChipStatus(), f1ErrorStatus(), f1GErrorStatus(), and f1Status().
| #define F1_CHIP_STAT_MASK 0x007e |
Referenced by f1ChipStatus().
| #define F1_CHIP_TRIGFIFO_OVERFLOW (1<<2) |
Referenced by f1ChipStatus().
| #define F1_CLKSRC_FP (1<<4) |
Referenced by f1Init().
| #define F1_CLKSRC_INT (0<<4) |
| #define F1_CLKSRC_MASK 0x30 |
Referenced by f1Init().
| #define F1_CLKSRC_VXS (2<<4) |
Referenced by f1Init().
| #define F1_CLOCK_SCALER_RESET 0 |
Referenced by f1TestResetClockCounter().
| #define F1_CLOCK_SCALER_START 0 |
Referenced by f1TestResetClockCounter().
| #define F1_CONFIG_CHIP_MASK 0x00E00000 |
| #define F1_CONFIG_COMMON (1<<20) |
| #define F1_CONFIG_CSR_BULK_ERASE (1<<30) |
| #define F1_CONFIG_CSR_LAST_DATA_MASK 0xFF |
| #define F1_CONFIG_CSR_SECTOR_BUSY (1<<8) |
| #define F1_CONFIG_CSR_SECTOR_ERASE (1<<29) |
| #define F1_CONFIG_CSR_WRITE_EN (1<<31) |
| #define F1_CONFIG_DATA_ADDR_MASK 0xFFFFFF00 |
| #define F1_CONFIG_DATA_DATA_MASK 0x000000FF |
| #define F1_CONFIG_DATA_MASK 0x0000FFFF |
| #define F1_CONFIG_REG_MASK 0x000F0000 |
| #define F1_CONTROL_MASK 0xffffffff |
Referenced by f1WriteControl().
| #define F1_CSR_BERR_STATUS (1<<5) |
Referenced by f1ReadBlock().
| #define F1_CSR_BLOCK_ACCEPTED (1<<3) |
| #define F1_CSR_BLOCK_READY (1<<4) |
Referenced by f1Bready(), f1GBready(), and f1Status().
| #define F1_CSR_BOARDCLK_PLL_LOCKED (1<<1) |
| #define F1_CSR_BUF0_EMPTY (1<<17) |
| #define F1_CSR_BUF1_EMPTY (1<<18) |
| #define F1_CSR_CONFIG_ERROR (1<<2) |
| #define F1_CSR_ERROR_MASK 0xFF00 |
Referenced by f1ErrorStatus(), f1GCheckLock(), f1GErrorStatus(), and f1Status().
| #define F1_CSR_ERROR_TDC0 (1<<8) |
| #define F1_CSR_ERROR_TDC1 (1<<9) |
| #define F1_CSR_ERROR_TDC2 (1<<10) |
| #define F1_CSR_ERROR_TDC3 (1<<11) |
| #define F1_CSR_ERROR_TDC4 (1<<12) |
| #define F1_CSR_ERROR_TDC5 (1<<13) |
| #define F1_CSR_ERROR_TDC6 (1<<14) |
| #define F1_CSR_ERROR_TDC7 (1<<15) |
| #define F1_CSR_MASK 0x7ffff |
| #define F1_CSR_MODULE_EMPTY (1<<7) |
Referenced by f1Status().
| #define F1_CSR_REFCLK_PLL_LOCKED (1<<0) |
| #define F1_CSR_SOFT_RESET (1<<30) |
Referenced by f1Clear(), and f1GClear().
| #define F1_CSR_START (1<<27) |
Referenced by f1GStart(), and f1Start().
| #define F1_CSR_SYNC_RESET (1<<28) |
Referenced by f1GSyncReset(), and f1SyncReset().
| #define F1_CSR_TOKEN_RETURN (1<<24) |
Referenced by f1ResetToken().
| #define F1_CSR_TOKEN_STATUS (1<<6) |
Referenced by f1ISR().
| #define F1_CTRL_SIGNALS_MASK 0x000003ff |
Referenced by f1Init().
| #define F1_DATA_BLKNUM_MASK 0x0000003f |
| #define F1_DATA_BLOCK_HEADER 0x00000000 |
Referenced by f1ReadBlock().
| #define F1_DATA_BLOCK_TRAILER 0x08000000 |
Referenced by f1ReadBlock().
| #define F1_DATA_CHAN_MASK 0x00070000 |
| #define F1_DATA_CHIP_MASK 0x00380000 |
| #define F1_DATA_EVENT_HEADER 0x10000000 |
| #define F1_DATA_FILLER 0x78000000 |
| #define F1_DATA_FLAG_MASK 0x07000000 |
| #define F1_DATA_INVALID 0x70000000 |
Referenced by f1FlushEvent(), and f1PrintEvent().
| #define F1_DATA_PULSE_INTEGRAL 0x38000000 |
| #define F1_DATA_PULSE_RAW 0x30000000 |
| #define F1_DATA_PULSE_TIME 0x40000000 |
| #define F1_DATA_SLOT_MASK 0x07c00000 |
Referenced by f1FlushEvent(), and f1PrintEvent().
| #define F1_DATA_STREAM 0x48000000 |
| #define F1_DATA_TDC_MASK 0x00ffffff |
| #define F1_DATA_TIME_MASK 0x0000ffff |
| #define F1_DATA_TRIGGER_TIME 0x18000000 |
| #define F1_DATA_TRIGNUM_MASK 0x07ffffff |
| #define F1_DATA_TYPE_DEFINE 0x80000000 |
Referenced by f1ReadBlock().
| #define F1_DATA_TYPE_MASK 0x78000000 |
Referenced by f1ReadBlock().
| #define F1_DATA_WINDOW_RAW 0x20000000 |
| #define F1_DATA_WINDOW_SUM 0x28000000 |
| #define F1_DATA_WRDCNT_MASK 0x003fffff |
| #define F1_DISABLE_EDGES 0x3f3f |
| #define F1_DISABLE_EDGES_EVEN 0x3fff |
| #define F1_DISABLE_EDGES_ODD 0xff3f |
| #define F1_DUMMY_DATA 0xf800ffff /* Filler word (Type 15) */ |
Referenced by f1ReadBlock().
| #define F1_ENABLE_BERR (1<<25) |
Referenced by f1DisableBusError(), f1EnableBusError(), f1FlushEvent(), f1GEnableBusError(), f1PrintEvent(), f1ReadBlock(), and f1Status().
| #define F1_ENABLE_DUAL_EDGES 0xc0c0 /* Both rising and falling edges */ |
| #define F1_ENABLE_EDGES 0x4040 /* Rising edges only - default */ |
Referenced by f1DisableData(), and f1EnableData().
| #define F1_ENABLE_MULTIBLOCK (1<<26) |
Referenced by f1DisableMultiBlock(), f1EnableMultiBlock(), and f1Status().
| #define F1_ENABLE_SOFT_CONTROL (1<<9) |
Referenced by f1DisableSoftTrig(), f1EnableSoftTrig(), f1GEnableSoftTrig(), f1GStart(), f1GSyncReset(), f1GTrig(), f1Init(), f1Start(), f1SyncReset(), and f1Trig().
| #define F1_EVENT_COUNT_MASK 0x00FFFFFF |
Referenced by f1DataScan(), f1Dready(), f1FlushEvent(), f1PrintEvent(), f1ReadBlock(), and f1Status().
| #define F1_FIRST_BOARD (1<<27) |
Referenced by f1EnableMultiBlock(), f1Init(), f1ReadBlock(), and f1Status().
| #define F1_FORCE_BUSY (1<<15) |
| #define F1_GO_DATA (1<<0) |
Referenced by f1Enable(), and f1Status().
| #define F1_HEAD_DATA 0x00000000 |
Referenced by f1PrintEvent().
| #define F1_HIREZ_MODE 0x8000 |
Referenced by f1GetRez().
| #define F1_HT_CHAN_MASK 0x00000007 |
| #define F1_HT_CHIP_MASK 0x00000038 |
Referenced by f1PrintEvent().
| #define F1_HT_DATA_MASK 0x00800007 |
Referenced by f1FlushEvent(), and f1PrintEvent().
| #define F1_HT_EVENT_MASK 0x003f0000 |
Referenced by f1PrintEvent().
| #define F1_HT_TRIG_MASK 0x0000ff80 |
Referenced by f1PrintEvent().
| #define F1_HT_TRIG_OVF_MASK 0x00400000 |
| #define F1_HT_XOR_MASK 0x00000040 |
| #define F1_IFLAG_NOFWCHECK (1<<18) |
Referenced by f1Init().
| #define F1_IFLAG_NOINIT (1<<16) |
Referenced by f1Init().
| #define F1_IFLAG_USELIST (1<<17) |
Referenced by f1Init().
| #define F1_INT_ENABLE (1<<24) |
Referenced by f1Status().
| #define F1_INT_LEVEL_MASK 0x700 |
Referenced by f1Status().
| #define F1_INT_VEC_MASK 0xff |
Referenced by f1Status().
| #define F1_LAST_BOARD (1<<28) |
Referenced by f1EnableMultiBlock(), f1Init(), and f1Status().
| #define F1_MAX_A32_MEM 0x800000 /* 8 Meg */ |
Referenced by f1Init().
| #define F1_MAX_A32MB_SIZE 0x1000000 /* 16 MB */ |
Referenced by f1Init().
| #define F1_MAX_BOARDS 20 |
| #define F1_MAX_HITS_PER_CHANNEL 8 |
Referenced by f1ReadBlock().
| #define F1_MAX_TDC_CHANNELS 64 |
Referenced by f1ReadBlock().
| #define F1_MAX_TDC_CHIPS 8 |
Referenced by f1CheckLock(), f1ChipStatus(), f1ErrorStatus(), f1GErrorStatus(), and f1Status().
| #define F1_MB_CONFIG_MASK 0x7c000000 |
Referenced by f1EnableMultiBlock().
| #define F1_MB_TOKEN_P0 (1<<29) |
Referenced by f1EnableMultiBlock(), and f1Status().
| #define F1_MB_TOKEN_P2 (1<<30) |
Referenced by f1EnableMultiBlock(), and f1Status().
| #define F1_OFFSET_MASK 0x3f3f |
Referenced by f1ConfigWrite(), and f1GConfigWrite().
| #define F1_PULSER_DAC_A_VALUE 0x00000000 |
Referenced by f1SetPulserDAC().
| #define F1_PULSER_DAC_B_VALUE 0x00010000 |
Referenced by f1SetPulserDAC().
| #define F1_PULSER_DAC_BOTH_VALUE 0x00070000 |
Referenced by f1SetPulserDAC().
| #define F1_PULSER_DAC_INT_REF 0x003f0001 |
Referenced by f1ResetPulser().
| #define F1_PULSER_DAC_MASK 0x0000fff0 |
Referenced by f1SetPulserDAC().
| #define F1_PULSER_DAC_RESET 0x002f0000 |
Referenced by f1ResetPulser().
| #define F1_PULSER_DELAY_MASK 0x00000fff |
Referenced by f1SetPulserTriggerDelay().
| #define F1_PULSER_PULSE_OUT (1<<0) |
Referenced by f1SoftPulser().
| #define F1_PULSER_TRIGGER_OUT (1<<1) |
Referenced by f1SoftPulser().
| #define F1_REFCLK_INTERNAL_ENABLE (1<<1) |
Referenced by f1EnableClk(), f1Init(), and f1Status().
| #define F1_REFCLK_SRC_FP (1<<2) |
Referenced by f1EnableClk(), f1Init(), and f1Status().
| #define F1_REFCLK_SRC_INTERNALFP (1<<0) |
Referenced by f1ConfigWrite(), f1DisableClk(), f1EnableClk(), f1GConfigWrite(), f1Init(), and f1Status().
| #define F1_REFCLK_SRC_MASK 0x7 |
Referenced by f1ConfigWrite(), f1DisableClk(), f1EnableClk(), and f1GConfigWrite().
| #define F1_SINGLE_BOARD_TEST_MODE (1<<17) |
Referenced by f1TestSetSystemTestMode().
| #define F1_SLOT_ID_MASK 0x1f0000 |
Referenced by f1Init().
| #define F1_SRSRC_EXT (1<<0) |
| #define F1_SRSRC_FP F1_SRSRC_EXT |
| #define F1_SRSRC_MASK 0x1 |
Referenced by f1Init().
| #define F1_SRSRC_SOFT (0<<0) |
| #define F1_SRSRC_VXS F1_SRSRC_EXT |
| #define F1_START_SRC_FP (1<<7) |
Referenced by f1Status().
| #define F1_START_SRC_MASK 0x180 |
Referenced by f1GStart(), f1Start(), and f1Status().
| #define F1_START_SRC_P0 (2<<7) |
Referenced by f1Status().
| #define F1_START_SRC_SOFT (3<<7) |
Referenced by f1GStart(), f1Start(), and f1Status().
| #define F1_STATUS_LED_ENABLE (1<<19) |
| #define F1_SUPPORTED_FIRMWARE | ( | x | ) | ((x==2)? F1_SUPPORTED_V2_FIRMWARE : F1_SUPPORTED_V3_FIRMWARE) |
Referenced by f1Init().
| #define F1_SUPPORTED_V2_FIRMWARE 0x0e |
| #define F1_SUPPORTED_V3_FIRMWARE 0x15 |
| #define F1_SYNC_RESET_SRC_FP (1<<3) |
Referenced by f1Init(), and f1Status().
| #define F1_SYNC_RESET_SRC_MASK 0x18 |
Referenced by f1GSyncReset(), f1Status(), and f1SyncReset().
| #define F1_SYNC_RESET_SRC_P0 (2<<3) |
Referenced by f1Init(), and f1Status().
| #define F1_SYNC_RESET_SRC_SOFT (3<<3) |
Referenced by f1GSyncReset(), f1Init(), f1Status(), and f1SyncReset().
| #define F1_SYNC_SCALER_RESET 0 |
Referenced by f1TestResetSyncCounter().
| #define F1_SYSTEM_TEST_MODE (1<<16) |
| #define F1_TAIL_DATA 0x00000007 |
Referenced by f1FlushEvent(), and f1PrintEvent().
| #define F1_TEST_BUSY_OUT (1<<1) |
Referenced by f1TestSetBusyOut().
| #define F1_TEST_CLOCK_COUNTER_STATUS (1<<15) |
Referenced by f1TestGetClockCounterStatus().
| #define F1_TEST_SDLINK_OUT (1<<2) |
Referenced by f1TestSetSdLink().
| #define F1_TEST_STATBITB_IN (1<<8) |
Referenced by f1TestGetStatBitB().
| #define F1_TEST_TOKEN_IN (1<<9) |
Referenced by f1TestGetTokenIn().
| #define F1_TEST_TOKEN_OUT (1<<3) |
Referenced by f1TestSetTokenOut().
| #define F1_TEST_TRIG_OUT (1<<0) |
Referenced by f1TestSetTrigOut().
| #define F1_TRIG1_SCALER_RESET 0 |
Referenced by f1TestResetTrig1Counter().
| #define F1_TRIG2_SCALER_RESET 0 |
Referenced by f1TestResetTrig2Counter().
| #define F1_TRIGGER_LED_ENABLE (1<<18) |
| #define F1_TRIGGER_SRC_FP (1<<5) |
Referenced by f1Init(), and f1Status().
| #define F1_TRIGGER_SRC_MASK 0x60 |
Referenced by f1GTrig(), f1Status(), and f1Trig().
| #define F1_TRIGGER_SRC_P0 (2<<5) |
Referenced by f1Init(), and f1Status().
| #define F1_TRIGGER_SRC_SOFT (3<<5) |
Referenced by f1GTrig(), f1Init(), f1Status(), and f1Trig().
| #define F1_TRIGSRC_FP (1<<1) |
| #define F1_TRIGSRC_MASK 0x6 |
Referenced by f1Init().
| #define F1_TRIGSRC_SOFT (0<<1) |
| #define F1_TRIGSRC_VXS (2<<1) |
| #define F1_VERSION_BOARDREV_MASK 0xFF00 |
Referenced by f1DataDecode(), f1Init(), f1ResetPulser(), f1SetConfig(), f1SetPulserDAC(), f1SetPulserTriggerDelay(), f1SoftPulser(), and f1Status().
| #define F1_VERSION_BOARDTYPE_MASK 0xFFFF0000 |
Referenced by f1Init().
| #define F1_VERSION_FIRMWARE_MASK 0xFF |
Referenced by f1GetFirmwareVersion(), f1Init(), and f1Status().
| #define F1_VME_INT_LEVEL 2 |
Referenced by f1Init().
| #define F1_VME_INT_VEC 0xEE |
Referenced by f1Init().
| int f1FirmwareDownloadConfigData | ( | int | id, |
| int | print_header | ||
| ) |
| int f1FirmwareEraseEPROM | ( | int | id | ) |
| int f1FirmwareGDownloadConfigData | ( | ) |
| int f1FirmwareGEraseEPROM | ( | ) |
| int f1FirmwareGVerifyDownload | ( | ) |
| int f1FirmwareReadFile | ( | char * | filename | ) |
| int f1FirmwareVerifyDownload | ( | int | id, |
| int | print_header | ||
| ) |
| int f1Init | ( | unsigned int | addr, |
| unsigned int | addr_inc, | ||
| int | ntdc, | ||
| int | iFlag | ||
| ) |
| int f1ReadBlock | ( | int | id, |
| volatile unsigned int * | data, | ||
| int | nwrds, | ||
| int | rflag | ||
| ) |
1.8.6 
