JLab f1TDC-V2,V3 Library  V2:0x0e,V3:0x15
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Initialization/Configuration

Modules

 Pulser Configuration (V3 only)
 

Functions

STATUS f1Init (UINT32 addr, UINT32 addr_inc, int ntdc, int iFlag)
 Initialize JLAB F1 TDC Library. More...
 
int f1Slot (unsigned int i)
 Convert an index into a slot number, where the index is the element of an array of F1TDCs in the order in which they were initialized. More...
 
int f1ConfigWrite (int id, int *config_data, int chipMask)
 Write the specified configuration to provided chips of the module in slot id indicated by the chipmask. More...
 
int f1GConfigWrite (int *config_data, int chipMask)
 Write the specified configuration to provided chips of all initialized f1TDCs indicated by the chipmask. More...
 
int f1SetConfig (int id, int iflag, int chipMask)
 Set which preset/user configuration to use for specified slot id for indicated chips in chipmask. More...
 
int f1ConfigReadFile (char *filename)
 Read in user defined (4) f1TDC chip registers from specified file. More...
 
void f1Clear (int id)
 Perform a soft reset on the f1TDC module. More...
 
void f1GClear ()
 Perform a soft reset on all initialized f1TDC modules. More...
 
void f1ClearStatus (int id, unsigned int chipMask)
 Clear the latched error status of specified f1TDC chips in the chipMask. More...
 
void f1GClearStatus (unsigned int chipMask)
 Clear the latched error status of specified f1TDC chips in the chipMask in all initialized f1TDCs. More...
 
void f1Reset (int id, int iFlag)
 Perform a hard reset of the module. More...
 
void f1SyncReset (int id)
 Perform a software Sync Reset on the module. More...
 
void f1GSyncReset ()
 Perform a software Sync Reset for all initialized modules. More...
 
void f1Trig (int id)
 Issue a software trigger to the module. More...
 
void f1GTrig ()
 Issue a software trigger to all initialized modules. More...
 
int f1SetWindow (int id, int window, int latency, int chipMask)
 Set the window parameters for specified f1TDC chips in chipMask on the module. More...
 
void f1GSetWindow (int window, int latency, int chipMask)
 Set the window parameters for specified f1TDC chips in chipMask for all initialized modules. More...
 
int f1WriteControl (int id, unsigned int val)
 Write provided value to the CTRL register of the module. More...
 
void f1GWriteControl (unsigned int val)
 Write provided value to the CTRL register to all initialized modules. More...
 
int f1Enable (int id)
 Enable f1TDC FPGA data fifo on the module. More...
 
int f1GEnable ()
 Enable f1TDC FPGA data fifo on all initialized modules. More...
 
int f1Disable (int id)
 Disable f1TDC FPGA data fifo on the module. More...
 
int f1GDisable ()
 Disable f1TDC FPGA data fifo on all initialized modules. More...
 
int f1EnableData (int id, int chipMask)
 Enable data on f1TDC chips specified in chipMask for the module. More...
 
void f1GEnableData (int chipMask)
 Enable data on f1TDC chips specified in chipMask for all initialized modules. More...
 
int f1DisableData (int id)
 Disable data on all f1TDC chips for the module. More...
 
int f1DisableChannel (int id, int input)
 Disable an individual channel input. More...
 
int f1EnableChannel (int id, int input)
 Enable an individual channel input. More...
 
void f1DisableChannelMask (int id, unsigned long long int mask)
 Disable inputs indicated in channel mask for the module. More...
 
void f1EnableChannelMask (int id, unsigned long long int mask)
 Enable inputs indicated in channel mask for the module. More...
 
void f1EnableClk (int id, int cflag)
 Enable the specified clock source on the module. More...
 
void f1DisableClk (int id)
 Disable the current clock source on the module. More...
 
unsigned int f1EnableLetra (int id, int chipMask)
 Enable lead and trailing edges for the f1TDC chips indicated by the chipMask for the module. More...
 
unsigned int f1DisableLetra (int id, int chipMask)
 Disable lead and trailing edges for the f1TDC chips indicated by the chipMask for the module. More...
 
void f1EnableSoftTrig (int id)
 Enable software triggers on the module. More...
 
void f1GEnableSoftTrig ()
 Enable software triggers for all initialized modules. More...
 
void f1DisableSoftTrig (int id)
 Disable software triggers on the module. More...
 
void f1EnableBusError (int id)
 Enable bus error block termination on the module. More...
 
void f1GEnableBusError ()
 Enable bus error block termination for all initialized modules. More...
 
void f1DisableBusError (int id)
 Disable bus error block termination on the module. More...
 
int f1SetBlockLevel (int id, int level)
 Set the block level (number of events per block) on the module. More...
 
void f1GSetBlockLevel (int level)
 Set the block level (number of events per block) on all initialized modules. More...
 
void f1EnableMultiBlock (int tflag)
 Enable multiblock readout for all initialized modules. More...
 
void f1DisableMultiBlock ()
 Disable multiblock readout for all initialized modules. More...
 
void f1ResetToken (int id)
 Reset the token for the module. More...
 

Detailed Description

Function Documentation

void f1Clear ( int  id)

Perform a soft reset on the f1TDC module.

Parameters
id
  • Slot Number

References f1tdc_struct::csr, F1_CSR_SOFT_RESET, f1ID, F1LOCK, f1p, and F1UNLOCK.

Referenced by f1FlushEvent().

void f1ClearStatus ( int  id,
unsigned int  chipMask 
)

Clear the latched error status of specified f1TDC chips in the chipMask.

Parameters
id
  • Slot Number
chipMask
  • Mask for f1TDC chips to clear latched error status

References F1_ALL_CHIPS, F1_CHIP_CLEAR_STATUS, f1ID, F1LOCK, f1Nchips, f1p, F1UNLOCK, and f1tdc_struct::stat.

Referenced by f1GClearStatus(), f1ISR(), f1Reset(), f1SetWindow(), and f1TestRead().

int f1ConfigReadFile ( char *  filename)

Read in user defined (4) f1TDC chip registers from specified file.

Parameters
filename
  • Name of file that contains f1TDC chip registers
Returns
OK if successful, otherwise ERROR.

References f1tdc_struct::config, and f1ConfigData.

int f1ConfigWrite ( int  id,
int *  config_data,
int  chipMask 
)

Write the specified configuration to provided chips of the module in slot id indicated by the chipmask.

Parameters
id
  • Slot Number
config_data
  • Array of configuration data to write to f1TDC chips. Each element refers to a specific f1TDC chip register.
chipmask
  • Mask of which chips to write to.
Returns
OK if Successfull, otherwise ERROR.

References f1tdc_struct::ctrl, F1_ALL_CHIPS, F1_CHIP_CLEAR_STATUS, F1_OFFSET_MASK, F1_REFCLK_SRC_INTERNALFP, F1_REFCLK_SRC_MASK, f1DisableData(), f1ID, F1LOCK, f1Nchips, f1p, F1UNLOCK, and f1tdc_struct::stat.

Referenced by f1Reset(), and f1SetConfig().

int f1Disable ( int  id)

Disable f1TDC FPGA data fifo on the module.

Parameters
id
  • Slot Number
Returns
OK if successful, otherwise ERROR

References f1tdc_struct::ctrl2, f1ID, F1LOCK, f1p, and F1UNLOCK.

Referenced by f1GDisable().

void f1DisableBusError ( int  id)

Disable bus error block termination on the module.

Parameters
id
  • Slot Number

References F1_ENABLE_BERR, f1ID, F1LOCK, f1p, and F1UNLOCK.

Referenced by f1EnableMultiBlock().

int f1DisableChannel ( int  id,
int  input 
)

Disable an individual channel input.

Parameters
id
  • Slot Number
input
  • Input channel to disable
Returns
OK if successful, otherwise ERROR
void f1DisableChannelMask ( int  id,
unsigned long long int  mask 
)

Disable inputs indicated in channel mask for the module.

Parameters
id
  • Slot Number
mask
  • Mask of input channels to DISABLE
void f1DisableClk ( int  id)

Disable the current clock source on the module.

Parameters
id
  • Slot Number

References F1_REFCLK_SRC_INTERNALFP, F1_REFCLK_SRC_MASK, f1ID, F1LOCK, f1p, and F1UNLOCK.

int f1DisableData ( int  id)

Disable data on all f1TDC chips for the module.

Parameters
id
  • Slot Number
Returns
OK if successful, otherwise ERROR

References f1tdc_struct::ctrl, F1_ENABLE_EDGES, f1ID, F1LOCK, f1Nchips, f1p, and F1UNLOCK.

Referenced by f1ConfigWrite(), and f1GConfigWrite().

unsigned int f1DisableLetra ( int  id,
int  chipMask 
)

Disable lead and trailing edges for the f1TDC chips indicated by the chipMask for the module.

Parameters
chipMask
  • Mask of chips to disable Lead and Trailing edges
id
  • Slot Number
Returns
Mask of initialized slots with leading and trailing edges enabled.

References F1_ALL_CHIPS, f1ID, f1LetraMode, and f1p.

void f1DisableMultiBlock ( )

Disable multiblock readout for all initialized modules.

References F1_ENABLE_MULTIBLOCK, f1ID, F1LOCK, f1p, F1UNLOCK, and nf1tdc.

void f1DisableSoftTrig ( int  id)

Disable software triggers on the module.

Parameters
id
  • Slot Number

References F1_ENABLE_SOFT_CONTROL, f1ID, F1LOCK, f1p, and F1UNLOCK.

int f1Enable ( int  id)

Enable f1TDC FPGA data fifo on the module.

Parameters
id
  • Slot Number
Returns
OK if successful, otherwise ERROR

References f1tdc_struct::ctrl2, F1_GO_DATA, f1ID, F1LOCK, f1p, and F1UNLOCK.

Referenced by f1GEnable().

void f1EnableBusError ( int  id)

Enable bus error block termination on the module.

Parameters
id
  • Slot Number

References F1_ENABLE_BERR, f1ID, F1LOCK, f1p, and F1UNLOCK.

Referenced by f1EnableMultiBlock().

int f1EnableChannel ( int  id,
int  input 
)

Enable an individual channel input.

Parameters
id
  • Slot Number
input
  • Input channel to enable
Returns
OK if successful, otherwise ERROR
void f1EnableChannelMask ( int  id,
unsigned long long int  mask 
)

Enable inputs indicated in channel mask for the module.

Parameters
id
  • Slot Number
mask
  • Mask of input channels to Enable
void f1EnableClk ( int  id,
int  cflag 
)

Enable the specified clock source on the module.

Parameters
id
  • Slot Number
cflagClock Source Flag
  • 0: P0/VXS
  • 1: Internal
  • 2: Front Panel

References F1_REFCLK_INTERNAL_ENABLE, F1_REFCLK_SRC_FP, F1_REFCLK_SRC_INTERNALFP, F1_REFCLK_SRC_MASK, f1ID, F1LOCK, f1p, and F1UNLOCK.

Referenced by f1Reset().

int f1EnableData ( int  id,
int  chipMask 
)

Enable data on f1TDC chips specified in chipMask for the module.

Parameters
id
  • Slot Number
chipMask
  • Mask of chips to enable
Returns
OK if successful, otherwise ERROR

References f1tdc_struct::ctrl, F1_ALL_CHIPS, F1_ENABLE_EDGES, f1ID, F1LOCK, f1Nchips, f1p, and F1UNLOCK.

Referenced by f1GEnableData(), and f1SetWindow().

unsigned int f1EnableLetra ( int  id,
int  chipMask 
)

Enable lead and trailing edges for the f1TDC chips indicated by the chipMask for the module.

Parameters
id
  • Slot Number
chipMask
  • Mask of chips to enable Lead and Trailing edges
Returns
Mask of initialized slots with leading and trailing edges enabled.

References F1_ALL_CHIPS, f1ID, f1LetraMode, and f1p.

void f1EnableMultiBlock ( int  tflag)

Enable multiblock readout for all initialized modules.

Parameters
tflagToken Flag
  • 0: Token passed through P2
  • >0: Token passed through P0/VXS

References F1_ENABLE_MULTIBLOCK, F1_FIRST_BOARD, F1_LAST_BOARD, F1_MB_CONFIG_MASK, F1_MB_TOKEN_P0, F1_MB_TOKEN_P2, f1DisableBusError(), f1EnableBusError(), f1ID, F1LOCK, f1MaxSlot, f1MinSlot, f1p, F1UNLOCK, and nf1tdc.

void f1EnableSoftTrig ( int  id)

Enable software triggers on the module.

Parameters
id
  • Slot Number

References F1_ENABLE_SOFT_CONTROL, f1ID, F1LOCK, f1p, and F1UNLOCK.

void f1GClear ( )

Perform a soft reset on all initialized f1TDC modules.

References f1tdc_struct::csr, F1_CSR_SOFT_RESET, f1ID, F1LOCK, f1p, F1UNLOCK, and nf1tdc.

Referenced by f1ISR(), and f1TestRead().

void f1GClearStatus ( unsigned int  chipMask)

Clear the latched error status of specified f1TDC chips in the chipMask in all initialized f1TDCs.

Parameters
chipMask
  • Mask for f1TDC chips to clear latched error status

References f1ClearStatus(), f1ID, and nf1tdc.

Referenced by f1Init().

int f1GConfigWrite ( int *  config_data,
int  chipMask 
)

Write the specified configuration to provided chips of all initialized f1TDCs indicated by the chipmask.

Parameters
config_data
  • Array of configuration data to write to f1TDC chips. Each element refers to a specific f1TDC chip register.
chipmask
  • Mask of which chips to write to.
Returns
OK if Successfull, otherwise ERROR.

References f1tdc_struct::ctrl, F1_ALL_CHIPS, F1_CHIP_CLEAR_STATUS, F1_OFFSET_MASK, F1_REFCLK_SRC_INTERNALFP, F1_REFCLK_SRC_MASK, f1DisableData(), f1ID, F1LOCK, f1Nchips, f1p, f1Slot(), F1UNLOCK, nf1tdc, and f1tdc_struct::stat.

Referenced by f1Init().

int f1GDisable ( )

Disable f1TDC FPGA data fifo on all initialized modules.

Returns
OK

References f1Disable(), f1ID, and nf1tdc.

int f1GEnable ( )

Enable f1TDC FPGA data fifo on all initialized modules.

Returns
OK

References f1Enable(), f1ID, and nf1tdc.

void f1GEnableBusError ( )

Enable bus error block termination for all initialized modules.

References F1_ENABLE_BERR, f1ID, F1LOCK, f1p, F1UNLOCK, and nf1tdc.

void f1GEnableData ( int  chipMask)

Enable data on f1TDC chips specified in chipMask for all initialized modules.

Parameters
id
  • Slot Number
chipMask
  • Mask of chips to enable
Returns
OK if successful, otherwise ERROR

References f1EnableData(), f1ID, and nf1tdc.

void f1GEnableSoftTrig ( )

Enable software triggers for all initialized modules.

References F1_ENABLE_SOFT_CONTROL, f1ID, F1LOCK, f1p, F1UNLOCK, and nf1tdc.

Referenced by f1TestRead().

void f1GSetBlockLevel ( int  level)

Set the block level (number of events per block) on all initialized modules.

Parameters
id
  • Slot Number
level
  • Number of events per block

References f1ID, F1LOCK, f1p, F1UNLOCK, and nf1tdc.

Referenced by f1Init().

void f1GSetWindow ( int  window,
int  latency,
int  chipMask 
)

Set the window parameters for specified f1TDC chips in chipMask for all initialized modules.

Parameters
window
  • Window size
latency
  • Window latency
chipMask
  • Mask of chips to write window settings
Returns
OK if successful, otherwise ERROR

References f1ID, f1SetWindow(), and nf1tdc.

void f1GSyncReset ( )

Perform a software Sync Reset for all initialized modules.

References f1tdc_struct::csr, f1tdc_struct::ctrl, F1_CSR_SYNC_RESET, F1_ENABLE_SOFT_CONTROL, F1_SYNC_RESET_SRC_MASK, F1_SYNC_RESET_SRC_SOFT, f1ID, F1LOCK, f1p, F1UNLOCK, and nf1tdc.

void f1GTrig ( )

Issue a software trigger to all initialized modules.

References f1tdc_struct::csr, f1tdc_struct::ctrl, F1_CSR_TRIGGER, F1_ENABLE_SOFT_CONTROL, F1_TRIGGER_SRC_MASK, F1_TRIGGER_SRC_SOFT, f1ID, F1LOCK, f1p, F1UNLOCK, and nf1tdc.

Referenced by f1TestRead().

void f1GWriteControl ( unsigned int  val)

Write provided value to the CTRL register to all initialized modules.

Parameters
id
  • Slot Number
val
  • Value to write to CTRL register

References f1ID, f1WriteControl(), and nf1tdc.

STATUS f1Init ( UINT32  addr,
UINT32  addr_inc,
int  ntdc,
int  iFlag 
)

Initialize JLAB F1 TDC Library.

Parameters
addr
  • A24 VME Address of the f1TDC
addr_inc
  • Amount to increment addr to find the next f1TDC
ntdc
  • Number of times to increment
iFlag
  • 18 bit integer for initialization flags
      Low 6 bits - Specifies the default Signal distribution (clock,trigger) 
                   sources for the board (Internal, FrontPanel, VXS, VME(Soft))
      bit    0:  defines Sync Reset source
                    0  VME (Software Sync-Reset)
                    1  Front Panel/VXS/P2 (Depends on Clk/Trig source selection)
      bits 2-1:  defines Trigger source
                  0 0  VME (Software Triggers)
                  0 1  Front Panel Input
                  1 0  VXS (P0) 
                       (all others Undefined - default to Internal)
      bits 5-4:  defines Clock Source
                  0 0  32 MHz Clock
                  0 1  Front Panel 
                  1 0  VXS (P0)
      bit 16:  Exit before board initialization
                    0  Initialize FADC (default behavior)
                    1  Skip initialization (just setup register map pointers)
      bit 17:  Use f1AddrList instead of addr and addr_inc
               for VME addresses.
                    0  Initialize with addr and addr_inc
                    1  Use f1AddrList
      bit 18:  Skip firmware check.  Useful for firmware updating.
                    0  Perform firmware check
                    1  Skip firmware check
Returns
OK, or ERROR if the address is invalid or a board is not present.

References f1tdc_struct::adr32, f1tdc_struct::adr_mb, f1tdc_struct::config, f1tdc_struct::csr, f1tdc_struct::ctrl, F1_ALL_CHIPS, F1_BOARD_ID, F1_CLKSRC_FP, F1_CLKSRC_MASK, F1_CLKSRC_VXS, F1_CSR_HARD_RESET, F1_CTRL_SIGNALS_MASK, F1_ENABLE_SOFT_CONTROL, F1_FIRST_BOARD, F1_IFLAG_NOFWCHECK, F1_IFLAG_NOINIT, F1_IFLAG_USELIST, F1_LAST_BOARD, F1_MAX_A32_MEM, F1_MAX_A32MB_SIZE, F1_REFCLK_INTERNAL_ENABLE, F1_REFCLK_SRC_FP, F1_REFCLK_SRC_INTERNALFP, F1_SLOT_ID_MASK, F1_SRSRC_MASK, F1_SUPPORTED_FIRMWARE, F1_SYNC_RESET_SRC_FP, F1_SYNC_RESET_SRC_P0, F1_SYNC_RESET_SRC_SOFT, F1_TRIGGER_SRC_FP, F1_TRIGGER_SRC_P0, F1_TRIGGER_SRC_SOFT, F1_TRIGSRC_MASK, F1_VERSION_BOARDREV_MASK, F1_VERSION_BOARDTYPE_MASK, F1_VERSION_FIRMWARE_MASK, F1_VME_INT_LEVEL, F1_VME_INT_VEC, f1AddrList, f1ChannelDisable, f1CheckLock(), f1ClockSource, f1ConfigData, f1GClearStatus(), f1GConfigWrite(), f1GSetBlockLevel(), f1ID, f1MaxSlot, f1MinSlot, f1Nchips, f1p, f1pd, f1pmb, f1Rev, f1tdcA24Offset, f1tdcA32Base, f1tdcA32Offset, f1tdcIntArg, f1tdcIntID, f1tdcIntLevel, f1tdcIntRoutine, f1tdcIntRunning, f1tdcIntVec, f1tdc_struct::intr, nf1tdc, and f1tdc_struct::version.

void f1Reset ( int  id,
int  iFlag 
)

Perform a hard reset of the module.

Hard reset of module. All f1TDC chip registers are re-written. A32 and A32 Multiblock settings are not restored.

Parameters
id
  • Slot Number
iFlag
  • Not used

References f1tdc_struct::adr32, f1tdc_struct::adr_mb, f1tdc_struct::csr, F1_ALL_CHIPS, F1_CSR_HARD_RESET, f1ClearStatus(), f1ConfigData, f1ConfigWrite(), f1EnableClk(), f1ID, F1LOCK, f1p, and F1UNLOCK.

void f1ResetToken ( int  id)

Reset the token for the module.

This routine only has an effect for the module marked as "FIRST" in the multiblock chain.

Parameters
id
  • Slot Number

References F1_CSR_TOKEN_RETURN, f1ID, F1LOCK, f1p, and F1UNLOCK.

int f1SetBlockLevel ( int  id,
int  level 
)

Set the block level (number of events per block) on the module.

Parameters
id
  • Slot Number
level
  • Number of events per block
Returns
OK if successful, otherwise ERROR

References F1_BLOCKLEVEL_MASK, f1ID, F1LOCK, f1p, and F1UNLOCK.

int f1SetConfig ( int  id,
int  iflag,
int  chipMask 
)

Set which preset/user configuration to use for specified slot id for indicated chips in chipmask.

Parameters
id
  • Slot Number
iflag
  • Set from four default configuations
       0 V2: Hi Rez      - Internal Clock (32 MHz)
       1 V2: Hi Rez      - External Clock (31.25 MHz)
       2 V3: Normal Rez  - Internal Clock (32 MHz)
       3 V3: Normal Rez  - External Clock (31.25 MHz)
       4 User specified (from file)
    
chipmask
  • Mask of which chips to write to.
Returns
OK if Successfull, otherwise ERROR.

References F1_VERSION_BOARDREV_MASK, f1ConfigData, f1ConfigWrite(), f1ID, f1p, and f1Rev.

int f1SetWindow ( int  id,
int  window,
int  latency,
int  chipMask 
)

Set the window parameters for specified f1TDC chips in chipMask on the module.

Parameters
id
  • Slot Number
window
  • Window size
latency
  • Window latency
chipMask
  • Mask of chips to write window settings
Returns
OK if successful, otherwise ERROR

References f1tdc_struct::config, F1_ALL_CHIPS, f1ClearStatus(), f1ClockSource, f1ConfigRead(), f1Enabled(), f1EnableData(), f1ID, F1LOCK, f1Nchips, f1p, and F1UNLOCK.

Referenced by f1GSetWindow().

int f1Slot ( unsigned int  i)

Convert an index into a slot number, where the index is the element of an array of F1TDCs in the order in which they were initialized.

Parameters
i
  • Initialization number
Returns
Slot number if Successfull, otherwise ERROR.

References f1ID, and nf1tdc.

Referenced by f1GConfigWrite().

void f1SyncReset ( int  id)

Perform a software Sync Reset on the module.

Parameters
id
  • Slot Number

References f1tdc_struct::csr, f1tdc_struct::ctrl, F1_CSR_SYNC_RESET, F1_ENABLE_SOFT_CONTROL, F1_SYNC_RESET_SRC_MASK, F1_SYNC_RESET_SRC_SOFT, f1ID, F1LOCK, f1p, and F1UNLOCK.

void f1Trig ( int  id)

Issue a software trigger to the module.

Parameters
id
  • Slot Number

References f1tdc_struct::csr, f1tdc_struct::ctrl, F1_CSR_TRIGGER, F1_ENABLE_SOFT_CONTROL, F1_TRIGGER_SRC_MASK, F1_TRIGGER_SRC_SOFT, f1ID, F1LOCK, f1p, and F1UNLOCK.

int f1WriteControl ( int  id,
unsigned int  val 
)

Write provided value to the CTRL register of the module.

Parameters
id
  • Slot Number
val
  • Value to write to CTRL register
Returns
Read value at CTRL register after the write, otherwise ERROR

References f1tdc_struct::ctrl, F1_CONTROL_MASK, f1ID, F1LOCK, f1p, and F1UNLOCK.

Referenced by f1GWriteControl().